Re: [Crash-utility] [PATCH 0/6] ppc64: Add support to understand Power ISA 3.0 based kernel
----- Original Message -----
With the introduction of radix MMU in Power ISA 3.0, there are
changes
in kernel page table management accommodating it. This patch series
makes appropriate changes here to work for such kernels. Also, this
series fixes a few bugs along the way. Patches successfully tested on
BOOK3S. It would be great if someone can test these patches on BOOK3E.
The changes effecting BOOK3E are minimal though.
Hari,
This looks to be a well-done overhaul of the ppc64 memory management.
I've done some cursory tests on live ppc64 and ppc64le systems, and a few
dumpfiles, e.g., running vtop on user-space and kernel module virtual
addresses, running vm on user-space tasks, etc.
But I don't know how to test these patches on BOOK3E because I don't have
any systems or old vmcores which have the "interrupt_base_book3e" symbol
that is used to set BOOK3E flag. Hopefully somebody on this list, or on
your cc: list, can test the patch-set.
Thanks,
Dave
---
Hari Bathini (6):
ppc64: fix vtop page translation for 4K pages
ppc64: Use kernel terminology for each level in 4-level page table
ppc64/book3s: address changes in kernel v4.5
ppc64/book3s: address change in page flags for PowerISA v3.0
ppc64: use physical addresses and unfold pud for 64K page size
ppc64/book3s: support big endian Linux page tables
defs.h | 74 +++++++++-----
ppc64.c | 340
+++++++++++++++++++++++++++++++++++++++++++++++++--------------
tools.c | 16 +++
3 files changed, 332 insertions(+), 98 deletions(-)
--
- Hari
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