----- Original Message -----
For ARM32 platfrom, The system will "offline" all CPUs
except the
crashing one, by clear the cpu_online_mask. So we need to find
another way to get online-CPUs number for crash utility.
This patch uses cpu_active_mask to get that value.
Signed-off-by: Liu Hua <sdu.liu(a)huawei.com>
---
arm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arm.c b/arm.c
index 3c38cd5..c94d7bf 100644
--- a/arm.c
+++ b/arm.c
@@ -1518,7 +1518,7 @@ arm_display_machine_stats(void)
static int
arm_get_smp_cpus(void)
{
- return get_cpus_online();
+ return get_cpus_active();
}
/*
When did this start happening? I ask because no other ARM users have
reported this until now. I've only got one sample SMP vmcore, and
clearly the non-crashing cpu was not offlined:
crash> sys
KERNEL: /usr/dumps/ARM/vmlinux.smp.gz
DUMPFILE: /usr/dumps/ARM/vmcore.smp
CPUS: 2
DATE: Fri Dec 31 19:00:37 1999
UPTIME: 00:00:33
LOAD AVERAGE: 0.00, 0.00, 0.00
TASKS: 31
NODENAME: ME.mop500
RELEASE: 2.6.36-rc6-next-20101005-00033-g5d269a5-dirty
VERSION: #20 SMP PREEMPT Fri Oct 8 10:34:09 CEST 2010
MACHINE: armv7l (unknown Mhz)
MEMORY: 88 MB
PANIC: "Internal error: Oops: 817 [#1] PREEMPT SMP" (check log for
details)
crash>
The non-panicking cpu was issued an IPI to shutdown:
crash> bt -a
PID: 0 TASK: c03eebc0 CPU: 0 COMMAND: "swapper"
#0 [<c01ddda0>] (machine_crash_nonpanic_core) from [<c0216754>]
#1 [<c0216754>] (generic_smp_call_function_single_interrupt) from
[<c01d3270>]
#2 [<c01d3270>] (do_IPI) from [<c01d8388>]
pc : [<c01d9a1c>] lr : [<c01d9a18>] psr: 60000013
sp : c03d3fc8 ip : c4bae044 fp : 00000000
r10: 00000000 r9 : 411fc091 r8 : 0001e3fc
r7 : c03efbb4 r6 : c01cfb3c r5 : c03ff4e0 r4 : c03d2000
r3 : 00000000 r2 : c03d3fc8 r1 : 00000001 r0 : c4ba09c0
Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM
#3 [<c01d8388>] (__irq_svc) from [<c01d9a18>]
#4 [<c01d9a1c>] (default_idle) from [<c01d9f3c>]
#5 [<c01d9f3c>] (cpu_idle) from [<c0008b28>]
#6 [<c0008b28>] (start_kernel) from [<00008038>]
PID: 408 TASK: c5195e00 CPU: 1 COMMAND: "sh"
#0 [<c03071ec>] (sysrq_handle_crash) from [<c03076ac>]
#1 [<c03076ac>] (__handle_sysrq) from [<c030777c>]
#2 [<c030777c>] (write_sysrq_trigger) from [<c028943c>]
#3 [<c028943c>] (proc_reg_write) from [<c024d4bc>]
#4 [<c024d4bc>] (vfs_write) from [<c024d5e4>]
#5 [<c024d5e4>] (sys_write) from [<c01d8880>]
pc : [<401f0c6c>] lr : [<401a9b70>] psr: 60000010
sp : bea07598 ip : 00000002 fp : 0007dd00
r10: 0000000a r9 : 00000000 r8 : 00000002
r7 : 00000004 r6 : 4009a000 r5 : 00000002 r4 : 40258650
r3 : 00000000 r2 : 00000002 r1 : 4009a000 r0 : 00000001
Flags: nZCv IRQs on FIQs on Mode USER_32 ISA ARM
crash>
And as expected, the cpu_online mask shows both cpus:
crash> help -k
... [ cut ] ...
cpu_possible_map: 0 1
cpu_present_map: 0 1
cpu_online_map: 0 1
...
Also, backwards-compatibility must be maintained, and it appears that
the cpu_active mask was only first introduced in 2.6.27. So perhaps it
should be something like:
--- arm.c.orig 2014-04-25 14:44:23.557665220 -0400
+++ arm.c 2014-04-25 15:13:46.709594145 -0400
@@ -1518,7 +1518,7 @@
static int
arm_get_smp_cpus(void)
{
- return get_cpus_online();
+ return MAX(get_cpus_active(), get_cpus_online());
}
Dave