Re: [Crash-utility] increase __PHYSICAL_MASK_SHIFT_XEN

> The current value of __PHYSICAL_MASK_SHIFT_XEN in crash (40) is > smaller than the kernel (52) since kernel commit 6f0e8bf167 (xen: > support 52 bit physical addresses in pv guests). > > This can cause x86_64_pud_offset() to lose the most significant > bits of pgd_pte, leading to a failed xen_m2p() translation, > resulting in crash failing with an error message like this: > crash: read error: physical address: ffffffffffffffff type: "pud page" > > Both Intel and AMD documentation mandate that unused physical > address bits must be 0, so there is no need to explicitly mask them > out with a mask narrower than the architecture limit of 52. This > is also confirmed by this kernel commit: b83ce5ee91. > > Increase the value of __PHYSICAL_MASK_SHIFT_XEN to 52. > > Signed-off-by: Jiri Bohac <jbohac(a)suse.cz&gt; > > diff --git a/defs.h b/defs.h > index e468b1d..848c1f6 100644 > --- a/defs.h > +++ b/defs.h > @@ -3583,7 +3583,7 @@ struct arm64_stackframe { > * PHYSICAL_PAGE_MASK changed (enlarged) between 2.4 and 2.6, so > * for safety, use the 2.6 values to generate it. > */ > -#define __PHYSICAL_MASK_SHIFT_XEN 40 > +#define __PHYSICAL_MASK_SHIFT_XEN 52 > #define __PHYSICAL_MASK_SHIFT_2_6 46 > #define __PHYSICAL_MASK_SHIFT_5LEVEL 52 > #define __PHYSICAL_MASK_SHIFT (machdep->machspec->physical_mask_shift) > Acked-by: Lianbo Jiang <lijiang(a)redhat.com&gt;