[Crash-utility] Re: [PATCH 0/4] arm64: Introduction of support 16K page with 4-level table

1. Add support to 16K page size and 4-level page table with 48 VA bits. 2. Fix 64K page size with 52 VA bits issue. Becuase we cannot use idmap_ptrs_per_pgd to know the size of ptrs_per_pgd. 3. Refactor the translation of PTE to physical address and fix indent issue.

Kuan-Ying Lee (4): arm64: fix indent issue and refactor PTE_TO_PHYS arm64: use the same expression to indicate ptrs_per_pgd arm64: fix 64K page and 52-bits VA support arm64: Support 16K page, 48 VA bits and 4 level page table arm64.c | 264 ++++++++++++++++++++++++++++++++++++++++++-------------- defs.h | 33 ++++++- 2 files changed, 227 insertions(+), 70 deletions(-) -- 2.43.0 -- Crash-utility mailing list -- devel(a)lists.crash-utility.osci.io To unsubscribe send an email to devel-leave(a)lists.crash-utility.osci.io https://${domain_name}/admin/lists/devel.lists.crash-utility.osci.io/ Contribution Guidelines: https://github.com/crash-utility/crash/wiki